Qualcomm clock updates for v6.7 Initial support for the SM4450 platform is introduced, with the Global Clock Controller and RPMh clock controller additions. CLK_SET_RATE_PARENT is dropped for clocks with fixed-rate GPLLs, across a variety of IPQ platforms. On IPQ6018, GPLL0 is a missing parent of APCS PLL, so this is corrected. For IPQ6018 the I2C clock for QUP6 was previously omitted, as disabling it is reported to cause problems for RPM. It's now added, but marked as critical. Stromer Plus is introduced, and safe source switching of the a53pll in IPQ5332 is introduced. SM8550 Video and GPU clock controllers are switched to use the OLE PLL configure method, instead of manually specifying additional components of the l-value. A couple of fixes related to halt bit checks and SMMU GDSC are introduced for MSM8998. A possible integer overflow in the frequency calculation in the RCG code is addressed. Clocked managed through RPM are removed from the MSM8996 Global Clock Controller. Support for the Camera Clock Controller on SM8550 is added. PLL configuration for the three HFPLLs in MSM8976 are added. The MSM8996 CBF clock driver's remove function is transitioned to the void-returning variant.