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  • drm-next-5.3-2019-06-25
    drm-next-5.3-2019-06-25:
    
    Merge drm-next
    
    amdgpu:
    - SR-IOV L1 policy fixes
    - Removed no longer needed vram_page_split module parameter
    - Add module parameter to override default ABM level
    - Gamma fixes
    - No need to check return values for debugfs
    - Improve HMM error handling
    - Avoid possible OOM situations when lots of thread are submitting with
      memory contention
    - Improve hw i2c access abritration
    - DSC (Display Stream Compression) support in DC
    - Initial navi10 support
      * DC support
      * GFX/Compute support
      * SDMA support
      * Power Management support
      * VCN support
    - Static checker fixes
    - Misc cleanups
    - fix long udelay on arm
    
    amdkfd:
    - Implement priority controls for gfx9
    - Enable VEGAM
    - Rework mqd allocation and init
    - Circular locking fix
    - Fix SDMA queue allocation race condition
    - No need to check return values for debugfs
    - Add proc style process information
    - Initial navi10 support
    
    radeon:
    - No need to check return values for debugfs
    
    UAPI changes:
    - GDDR6 added to vram type query
    - New Navi10 details added gpu info query
    - Navi family added to asic family query
  • drm-msm-next-2019-06-25
  • regulator-couple-api
    regulator: Coupling API
    
    This series introduces a way of specifying a customized regulators coupler
    which is necessary for cases like a non-trivial DVFS implementation.
    
  • v4.14.130
    bc2bccef · Linux 4.14.130 ·
    This is the 4.14.130 stable release
    
  • v4.19.56
    aec3002d · Linux 4.19.56 ·
    This is the 4.19.56 stable release
    
  • v5.1.15
    f0fae702 · Linux 5.1.15 ·
    This is the 5.1.15 stable release
    
  • drm-next-5.3-2019-06-24
    drm-next-5.3-2019-06-24:
    
    amdgpu:
    - Fix a regression with uvd init on some older asics due to Navi merge
    - Disable gfx off on navi10 until it's ready
  • drm-next-5.3-2019-06-22
    drm-next-5.3-2019-06-22:
    
    amdgpu:
    - SR-IOV L1 policy fixes
    - Removed no longer needed vram_page_split module parameter
    - Add module parameter to override default ABM level
    - Gamma fixes
    - No need to check return values for debugfs
    - Improve HMM error handling
    - Avoid possible OOM situations when lots of thread are submitting with
      memory contention
    - Improve hw i2c access abritration
    - DSC (Display Stream Compression) support in DC
    - Initial navi10 support
      * DC support
      * GFX/Compute support
      * SDMA support
      * Power Management support
      * VCN support
    
    amdkfd:
    - Implement priority controls for gfx9
    - Enable VEGAM
    - Rework mqd allocation and init
    - Circular locking fix
    - Fix SDMA queue allocation race condition
    - No need to check return values for debugfs
    - Add proc style process information
    - Initial navi10 support
    
    radeon:
    - No need to check return values for debugfs
    
    UAPI changes:
    - GDDR6 added to vram type query
    - New Navi10 details added gpu info query
    - Navi family added to asic family query
  • v5.2-rc6
    4b972a01 · Linux 5.2-rc6 ·
    Linux 5.2-rc6
    
  • v4.19.55
    78778071 · Linux 4.19.55 ·
    This is the 4.19.55 stable release
    
  • v5.1.14
    5f0a74b4 · Linux 5.1.14 ·
    This is the 5.1.14 stable release
    
  • v4.4.183
    30874325 · Linux 4.4.183 ·
    This is the 4.4.183 stable release
    
  • v4.9.183
    72f67fd7 · Linux 4.9.183 ·
    This is the 4.9.183 stable release
    
  • v4.14.129
    a5758c53 · Linux 4.14.129 ·
    This is the 4.14.129 stable release
    
  • v4.19.54
    63bbbcd8 · Linux 4.19.54 ·
    This is the 4.19.54 stable release
    
  • v5.1.13
    7da3d9e6 · Linux 5.1.13 ·
    This is the 5.1.13 stable release
    
  • sunxi-ng-parent-rewrite-part-1-take-2
    Allwinner sunxi-ng clk driver parent relation rewrite part 1 - take 2
    
    The first part of ongoing work to convert the sunxi-ng clk driver from
    using global clock name strings to describe clk parenting, to having
    direct struct clk_hw pointers, or local names based on clock-names from
    the device tree binding.
    
    This is based on Stephen Boyd's recent work allowing clk drivers to
    specify clk parents using struct clk_hw * or parsing DT phandles in the
    clk node.
    
    This series can be split into a few major parts:
    
    1) The first patch is a small fix for clk debugfs representation.
    
    2) A bunch of CLK_HW_INIT_* helper macros are added. These cover the
       situations I encountered, or assume I will encounter, such as single
       internal (struct clk_hw *) parent, single DT (struct clk_parent_data
       .fw_name), multiple internal parents, and multiple mixed (internal +
       DT) parents. A special variant for just an internal single parent is
       added, CLK_HW_INIT_HWS, which lets the driver share the singular
       list, instead of having the compiler create a compound literal every
       time. It might even make sense to only keep this variant.
    
    3) A bunch of CLK_FIXED_FACTOR_* helper macros are added. The rationale
       is the same as the single parent CLK_HW_INIT_* helpers.
    
    4) Bulk conversion of CLK_FIXED_FACTOR to use local parent references,
       either struct clk_hw * or DT .fw_name types, whichever the hardware
       requires.
    
    5) The beginning of SUNXI_CCU_GATE conversion to local parent
       references. This part is not done. They are included as justification
       and examples for the shared list of clk parents case.
    
  • sunxi-clk-for-5.3-201906210814
    A few patches to fix two minor bugs, and to introduce a schemas for
    our device tree bindings.
    
  • sunxi-config64-for-5.3-201906210813
    Our usual bunch of arm64 defconfig changes, this time mostly to enable
    some missing drivers for the Allwinner A64.
    
  • sunxi-h3-h5-for-5.3-201906210812
    This time we only have a single patch for our command branch between
    arm and arm64, a fix for the array syntax raised by our DT schemas.