generator

Application for generating a rules file that can be used with OpenHab 2.0. A file can be easily generated by modifying an input file in form of a table.

Create fast Fourier transform (FFT) processing hardware for your FPGA or CPLD. Use this tool to create an FFT core of any width or length. Customize to your project's needs. FFT hardware is generated in the SystemVeilog (SV) hardware description language (HDL).

generate a PDFLaTeX file with random attributes from a text file