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qcom-driver-fixes-for-6.3f3d0fbad · ·
Qualcomm driver fixes for v6.3 Support for the secure world interrupting the SCM driver drive the wait queue mechanism was recently introduced, but most platforms doesn't have this mechanism and an error should not be printed in the log. The rmtfs_mem driver recently gained support for assigning the region to multiple VMIDs, but accidentally removed the support for running without assignment. A couple of changes are introducd to correct this. The SC8280XP LLCC slice configuration is wrong, reslting in incorrect configuration of the hardware. The table is corrected, based on the datasheet.
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qcom-dts-fixes-for-6.3ecd24087 · ·
Qualcomm ARM32 Devicetree fixes for v6.3 This introduces missing reserved-memory ranges on LG G Watch R, resolving stability issues caused by Linux reusing memory used by firmware.
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qcom-arm64-fixes-for-6.307b0883e · ·
Qualcomm ARM64 Devicetree fixes for v6.3 This correct SIM card selection on the two newly introduced MSM8916-based USB modems. The firmware-name for the first CDSP is corrected on the SA8540P Ride board. The PCIe controller in SC7280 is marked cache-coherent, which resolves seen data corruption issues. Labels are added to the vadc channel nodes on SC8280XP, as the Linux driver was updated to not include the unit address when generating device names and collisions thereby prevented registration of the channels. Audio clocks and routing is corrected and a few regulators are marked always-on for the Lenovo Thinkpad X13s, as their clients are not fully described at this point. SPI5 was accidentally enabled by default on SM6115, and is disabled again. CDSP on SM6375 is provided its power-domains, to appropriately vote for during power up for the DSP. The iommu mask for the PCIe controllers in SM8150 is updated, to match what the hypervisor expects. Th Venus firmware path is corrected on Xiaomi Mi Pad 5 Pro. The UFS controller is marked cache coherent on SM8350 and SM8450. The clocks for the second WSA macro on SM8450 is corrected, and given its own clocks. The bias-pull-up value for I2C pins are corrected on SM8550, to trigger the selection of the strong pull. CPU compatibles and the base address of the LPASS TLMM block are corrected.