RISC-V

Experiments and examples for the WEMOS LOLIN C3 MINI board.

Robotics, RISC-V, RPi, Arduino, ODBII, and IoT in general

Blink example using no external crate, the Peripherals Access Crate gd32vf103-pac, then using the Hardware Abstraction Layer gd32vf103xx-hal.

Requires rust nightly.

Check https://gitlab.com/jeancf/longan-nano-blink for the assembly version.

This is a project to enable other developers to modify an open source spec for a CPU, build a simulator and run tests.

Board Support Packages (BSPs) for SoCLib platforms in the RTEMS kernel

Retro-V is a SoftCPU in Verilog that implements RISC-V 32-bit architecture RV32I, but with 8-bit external bus

A 32-bit pipelined RISC-V CPU