verilog

A basic RV32I core for practice.

The soft core for the Ice Sea VR headset. Designed to be run on the FPGA of the headset mainboard

My own Single-Borard-Computer projects.

Containerized FlexLM license manager for Questa*-Intel® FPGA Edition Software.

Containerized Questa*-Intel® FPGA Edition Software.

A collection of Perl scripts for digital design simulation and FPGA synthesis automation. It supports Verilog, VHDL and mixed language (Verilog + VHDL) designs.

Newest version of microprocessor design for Artix-7 100 Digilent Arty board. Includes the migrated Python assembler code as well, and a assembly-language implementation of Conway's Game of Life coded for this design.

Automate building the tools from Project IceStorm

A Docker image with the ModelSim HDL simulator

UT Computer Architecture Lab F96

Single-Cycle with Pipeline Processor