V
verilog
Projects with this topic
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Set of simple modules to communicate via SPI protocol.
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This project is about building Hack on real hardware as proposed in chapter 13 of the course nand2tetris using only FOSS, free and open source hard- and software.
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Set of simple modules to communicate via UART
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Collection of simple interfaces for Digilent Pmods
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Este repositorio contiene un resumen de los trabajos y proyectos en los que he participado. This repository contains a summary of the works and projects in which I have participated.
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Verilog (and HLS, C++, Python) implementation of the RC4 stream cipher.
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My CPU / Microcontroller
Experiments on building a processing unit. Arduino Nano for test patterns on ICs.
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